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    • 专利摘要:
    A method and apparatus are disclosed for forming a high concentration borophosphosilicate glass film stabilized in situ on a semiconductor wafer or substrate. In one embodiment, the method is initiated by providing a substrate to a chamber. The method continues by providing a silicon source, an oxygen source, a boron source, and a phosphorous source in the chamber to form a high concentration of borophosphosilicate glass layer on the substrate. The method further includes reflowing the high concentration of borophosphosilicate glass layer formed on the substrate.
    公开号:KR20040030827A
    申请号:KR10-2004-7000910
    申请日:2002-07-23
    公开日:2004-04-09
    发明作者:스티브 가나옘；다니엘 에이. 칼；존 티. 보라드；캐리 칭；쳉 위안
    申请人:어플라이드 머티어리얼스, 인코포레이티드；
    IPC主号:
    专利说明:

    Chemical vapor deposition method of borophosphosilicate glass film {METHOD FOR CVD OF BPSG FILMS}
    [2] Silicon dioxide (SiO 2 ) is widely used as an insulating layer in the manufacture of semiconductor devices. Silicon oxide films are generally deposited by thermochemical vapor deposition (CVD) or plasma enhanced chemical vapor deposition (PECVD) from the reaction of a silicon containing source with an oxygen containing source such as ozone (O 3 ) or oxygen (O 2 ). In general, the reaction rate in thermal and plasma CVD processes may be controlled by controlling one or more of temperature, pressure, flow rate of reactant gas, RF power.
    [3] The silicon oxide layer is used as a separation layer between the polysilicon gate level and the first metal level of the metal oxide (MOS) transistor. This isolation layer is generally referred to as a premetal dielectric (PMD) layer because it is deposited before a given metal level in a multilevel metal structure. In addition to having low stress and low contaminants, it is important that the PMD layer has good flatness and gap filling properties.
    [4] When a silicon oxide film is used as the PMD layer, the silicon oxide film is deposited on a silicon substrate having a low level polysilicon gate / interconnection layer. The surface of the silicon substrate may include insulating structures such as gaps or trenches, and raised or stepped surfaces such as polysilicon and interconnects. Initially deposited films generally coincide with the topography of the substrate surface and are usually lithography before the planarized and overlying metal layer is deposited.
    [5] As semiconductor design technology has advanced, the minimum wiring width of semiconductor devices has been drastically reduced. Many integrated circuits now have microstructures such as trenches that are less than 0.5 microns. Fabricating submicron devices introduces many challenges, including the ability to fully fill narrow gaps / trenches, for example in a pore-free manner. If the trench is wide and shallow, it is quite easy to completely fill the trench with silicon oxide glass. As the trench becomes narrower and the aspect ratio (the ratio of trench height to trench width) increases, the likelihood of voids forming in the gap / trench increases. Under certain conditions, the voids may be filled during the glass reflow process, but as the trench is narrower or the thermal budget allowed for glass reflow is reduced, the voids may not be filled during the reflow process at low temperatures. The probability increases. Such voids are undesirable because they can reduce the yield of good chips per wafer and the reliability of the device.
    [6] For many years, boron and phosphorus doped silicate films, such as borophosphosilicate glass (BPSG) films deposited with a liquid source such as tetraethyloltosilicate (TEOS), have been found to contain silicon due to their excellent gap fill performance upon glass reflow. Preferred among oxide films. Moreover, BPSG films have found particular applicability in applications that use glass reflow steps to flatten the PMD layer. This doped oxide glass layer lowers the glass transition temperature of the glass layer and causes the layer to soften and reflow, thereby softening the underlying shape.
    [7] However, conventional doped oxide glass film deposition and / or reflow processes, for example, perform film deposition and / or reflow at very high temperatures of about 800-900 ° C., and the gaps in the substrates of submicron semiconductor devices or There are many limitations to the complete filling of voids. Another limitation of conventional doped oxide glass film deposition and / or reflow processes is that the doping concentrations of boron and phosphorus are kept very low to avoid hygroscopicity and surface microcrystalline defects when the film is exposed to moisture. I have to. Another limitation of conventional doped oxide glass film deposition and / or reflow processes is that the moisture present in the surroundings is absorbed to prevent the film from penetrating into the doped silicon glass film prior to densification during annealing or reflow. The process generally requires the deposition of a capping layer of undoped silicon glass (USG) film (or trace doped boron and phosphorus glass films).
    [8] Another manufacturing challenge presented by the submicron device is to minimize the overall heat balance of the integrated circuit fabrication process to maintain shallow junctions and to prevent degradation of metal contact structures, among other reasons. One way to reduce the overall heat balance of the manufacturing process is to reduce the reflow temperature of the BPSG premetal dielectric layer to about 750 ° C. However, for submicron semiconductor devices, such as highly integrated DRAM devices or logic memory devices with high aspect ratio (for example about 6: 1 or more) trenches, no change is made to the current glass deposition and / or reflow process. However, reducing the reflow temperature of the BPSG layer seems insufficient to completely fill the narrow trenches in a void-free manner.
    [1] FIELD OF THE INVENTION The present invention generally relates to the field of substrate processing for semiconductor manufacturing and more particularly to improved methods and apparatus for forming high concentration borophosphosilicate glass (BPSG) films stabilized in situ on a semiconductor wafer. It is about.
    [10] The invention is illustrated by the examples and is not limited by the accompanying drawings.
    [11] 1A shows a schematic diagram of an exemplary multichamber system 10 for forming a high concentration borophosphosilicate glass (PBSG) film stabilized in situ in accordance with the present invention on a semiconductor substrate or wafer,
    [12] FIG. 1B illustrates an exemplary embodiment of a chamber for depositing a doped silicon oxide layer on a substrate in the multichamber system of FIG. 1A;
    [13] FIG. 1C illustrates an exemplary embodiment of a chamber for rapid thermal processing reflow of a substrate subsequent to silicon oxide layer deposition in the multichamber system of FIG. 1A;
    [14] FIG. 2 illustrates an exemplary embodiment of a hierarchy of system control computer programs stored in the memory of the system controller of the multichamber system of FIG. 1A, and FIG.
    [15] 3 is a contour view of an embodiment of a method of forming a high concentration borophosphosilicate glass film stabilized in situ on a semiconductor wafer in accordance with the present invention;
    [16] 4A is a simplified cross sectional view of the substrate following BPSG film deposition;
    [17] 4B is a simplified cross-sectional view of a substrate having a BPSG film deposited over the substrate following the reflow step according to the method of FIG. 3.
    [9] Therefore, it is an object of the present invention to provide a method and apparatus for forming a high concentration borophosphosilicate glass film stabilized in situ on a semiconductor wafer or substrate. In an embodiment, the method is initiated by providing a substrate in a chamber. The method continues by providing a silicon source, an oxygen source, a boron source and a phosphorous source in the chamber to form a high concentration of borophosphosilicate glass layer on the substrate. The method further includes reflowing the high concentration of borophosphosilicate glass layer formed on the substrate.
    [18] An improved method and apparatus is disclosed for forming a high concentration borophosphosilicate glass (BPSG) film stabilized in situ on a substrate or semiconductor wafer. In the following detailed description, numerous specific details are set forth in order to provide a more thorough understanding of the present invention. However, it will be apparent to one of ordinary skill in the art that the present invention may be practiced without these specific details. In other instances, well-known devices, methods, procedures, and individual components have not been described in detail in order not to unnecessarily obscure aspects of the present invention.
    [19] 1A illustrates an exemplary substrate processing system, such as a multichamber system 10 that forms a highly concentrated borophosphosilicate glass (BPSG) film on a semiconductor substrate or wafer in situ in accordance with an embodiment of the present invention. A schematic diagram is shown. The multichamber system 10, known as a cluster tool, has the ability to process multiple substrates between the chambers without vacuum breakage and exposing the wafer to moisture or other contaminants outside the multichamber system 10. An advantage of the multichamber system 10 is that different chambers 12a-c, 14, 16, 18 in the multichamber system 10 may be used for different purposes in the overall process. For example, chambers 12a, 12b, 12c may be used to deposit doped boron phosphorus silicon oxide on a semiconductor wafer / substrate, respectively, and chamber 14 may be used to deposit a doped silicon oxide film on a substrate. After deposition it may be used for rapid thermal processing (RTP), for example reflow, and another chamber 16 may be used as a substrate cooldown chamber after RTP. The other chamber 18 may serve another purpose in the process, for example, as an auxiliary chamber for loading / unloading the substrate into the multichamber system 10. The process proceeds undisturbed within the multichamber system 10, resulting in wafer contamination that often occurs when transferring wafers between various separate chambers (not within one multichamber system) for different parts of the process. To prevent. By carrying out the deposition and heating steps in the same multichamber system 10, the thickness, uniformity, and moisture content of the deposited dielectric film can be better controlled.
    [20] Referring to FIG. 1A, the system controller 80 controls all operations of the substrate processing system, eg, the chamber CVD system 10. In one embodiment of the present invention, the system controller 80 includes a hard disk drive (memory 82), a floppy disk drive, and a processor 84. Processor 84 includes a single board computer (SBC), analog and digital input / output boards, interface boards, and stepper motor controller boards. Various components of the CVD system 10 conform to the Versa Modular European (VME) standard, which defines board, card cage, and connector dimensions and shapes. The VME standard also defines a bus structure with a 16-bit data bus and a 2-bit address bus.
    [21] System controller 80 executes system control software, which is a computer program stored on a computer readable medium such as memory 82. Preferably, memory 82 is a hard disk drive, but memory 82 may also be another type of memory. The computer program includes a set of instructions that indicate time, mixing of gas, chamber pressure, chamber temperature, lamp power level, susceptor position, and other variables of a particular process. Of course, other computer programs, such as, for example, programs stored in another memory device, including a floppy disk or another suitable drive, may also be used to operate the controller 80. Input / output devices 86 such as CRT monitors and keyboards are used to interface between the user and the controller 80.
    [22] 1B and 1C show exemplary embodiments of chambers 12a-c, 14, 16, and 18 in multichamber system 10 used for substrate processing. In particular, FIG. 1B shows a chamber for depositing a doped silicon oxide layer on the substrate, and FIG. 1C shows a chamber for rapid thermal processing (RTP) of the substrate following deposition of the silicon oxide layer. These two chambers are described in detail later.
    [23] The structure, arrangement, hardware elements, etc. of the multichamber system 10, and the chambers 12a-c, 14, 16, 18 shown in FIGS. 1B and 1C are performed with sub-atmospheric chemical vapor deposition. (SACVD) process, substrate process specifications set by the semiconductor manufacturing client, and technical advances / optimizations may vary depending on numerous considerations. Therefore, not all chamber hardware elements shown in FIGS. 1B and 1C may be included in all chambers 12a-c, 14, 16, and 18 in multichamber system 10.
    [24] 1B is an exemplary representative view of deposition chambers 12a-c in multichamber system 10. Referring to FIG. 1B, the deposition chambers 12a-c in the multichamber system 10 include a hermetic enclosure assembly 20 containing a vacuum chamber 22 having a gas reaction zone 24. The gas distribution plate 26 with perforations is applied to a semiconductor wafer or substrate 50 placed on a heater 28 (referred to as a wafer support pedestal or susceptor) that is capable of vertically moving the reactant gas through perforations in the plate 26. On the gas reaction zone 24 to disperse. The multichamber system 10 further includes a heater / elevation assembly 30 that heats the wafer 50 supported on the heater 28. The heater / elevating assembly 30 may be controllably moved between the lower loading / off-loading position and the upper processing position indicated by the dashed line 32 adjacent the plate 26 as shown in FIG. 1B. The center board (not shown) includes a sensor that provides information about the wafer 50 location. The heater 28 includes a resistive heating element surrounded by a ceramic such as aluminum nitride. When the heater 28 and the wafer 50 are in the processing position 32, they are along the inner wall 36 of the multichamber system 10 by the chamber liner 34 and the chamber liner 34 and the chamber 22. Surrounded by an annular pumping channel 38 formed by the top of The surface of the chamber liner 34 serves to lower the temperature gradient between the resistive heating heater 28 (high temperature) and the chamber wall 38, which is much lower than the heater 28.
    [25] The reaction and carrier gas are fed to the gas mixing block (or gas mixing box) 42 via the supply line 40, where they are preferably mixed with each other and delivered to the plate 26. In a preferred embodiment, the reaction source is a liquid that is first vaporized by the liquid injection system 44 and then combined with an inert carrier gas such as helium. The gas mixing block 42 may be a dual input mixing block coupled to the process gas supply line 40 and the cleaning gas conduit 46. One or more pumps 43 coupled to the gas outlet are generally used to control chamber pressure (and gas injection into the chamber). The system controller 80 controls the operation of a valve (not shown) to select which of these two alternating gas sources will be sent to the plate to be distributed into the vacuum chamber 22. Conduit 46 receives cleaning gas from integrated remote plasma system 48. During deposition processing, the gas supplied to the plate 26 sails through the wafer 50 surface where the gas may be evenly distributed radially across the wafer surface, generally in a laminar flow. The purge gas may be delivered from the inlet port or tube (not shown) into the chamber 22 through the bottom wall of the hermetic shell assembly 20. It should be noted that the integrated remote plasma system 48 may be used for periodic chamber cleaning, wafer cleaning, or deposition steps.
    [26] Referring again to FIG. 1C, an embodiment of a chamber 14 for rapid thermal processing (RTP) of a wafer following dielectric film deposition, which is part of the multichamber system 10, is shown. The RTP chamber 14 embodiment described below includes four major components throughout. The first part consists of a radiant heat source or lamp head 52. The second and third components consist of a temperature measurement system 54 and a closed loop control system 56 that drives the lamp head 52. The fourth component is wafer process chamber 58. A highly reflective coating is applied to the chamber bottom plate 60 using a material that is compatible with semiconductor processing. It should be noted that FIG. 1C details a portion of the RTP wafer process chamber 58, lamp head 52, and temperature measurement system 54.
    [27] Facilities for gas processing, low pressure operation, and wafer exchange are provided in the RTP wafer process chamber 58. The wafer 50 (shown in dashed lines) is supported in the chamber 58 by a silicon carbide support ring 62 that only contacts the outer edge of the wafer 50. The ring is mounted on a quartz cylinder 64 extending to the chamber bottom where the ring is supported by a bearing (not shown). The bearing is magnetically coupled to an external motor (not shown) used to rotate the wafer 50 and the assembly (ie, rings, quartz cylinders, etc.). Temperature measuring probes connected to fiber optics 66 are mounted to the chamber bottom as shown in FIG. 1C. The structure of this RTP chamber system provides the flexibility to modify the chamber material and the design to accommodate the process requirements and wafer form, but the design of the radiant heat source and temperature measurement and control system remains essentially unchanged. Will be described later.
    [28] The lamp head 52 is made of a honeycomb tube 68 in a water jacket housing or assembly 70. Each tube 68 includes a tungsten halogen lamp assembly that forms the reflector and honeycomb light pipe device 72. This dense hexagonal arrangement of the collimated light pipe provides a high power density with good spatial resolution of the lamp output to the radiant energy source. Wafer rotation is used to smooth the lamp to ramp changes, which eliminates the need to match lamp performance.
    [29] With continued reference to FIG. 1C, the quartz window 74 separates the lamp head 52 from the chamber 58. Generally, a thin window of about 4 mm is used which reduces the "thermal memory" by minimizing the thermal mass absorbed. The window 74 is cooled by the contact with the lamp head 52. For reduced pressure operation, window 74 may be replaced with an adapter plate (not shown).
    [30] An important aspect of lamp head 52 design for reliable wafer processing in a manufacturing environment is the robustness as a radiant heat source. The lamp head system 52 is designed with sufficient reserve so that the lamp 72 can work well below its estimate. In this design (this embodiment generally has 187 lamps for 200 mm wafer size), the use of numerous lamps results in lamp redundancy. If the lamp breaks during operation in a given zone, multi-point closed loop control will maintain the temperature set point. The use of wafer rotation will average local changes in strength that may occur so that degradation of process performance will not occur.
    [31] Rapid thermal processing of the deposited BPSG film layer is formed by an in-situ reaction of a dry (eg N 2 or O 2 ) atmosphere, a wet (eg water vapor, H 2 O) atmosphere, H 2 and O 2 . It may also be carried out in a humid atmosphere, or a combination thereof (ex-situ). As shown in FIG. 1C, in one embodiment the hydrogen source 76 and the oxygen source 78 are coupled to the RTP chamber 14.
    [32] 1A and 2, the multichamber system 10 further includes a system controller 80 that controls all operations of the multichamber CVD system. In one embodiment of the present invention, the system controller 80 includes a hard disk drive (memory 82), a floppy disk drive, and a processor 84. Input / output devices 86 such as CRT monitors and keyboards are used to interface between the user and the controller 80.
    [33] System controller 80 executes system control software, which is a computer program stored on a computer readable medium, such as memory 82. Preferably, memory 82 is a hard disk drive, but memory 82 may also be another type of memory. Preferably, memory 82 is a hard disk drive, but memory 82 may also be another type of memory. The computer program includes a set of instructions that indicate time, mixing of gas, chamber pressure, chamber temperature, lamp power level, susceptor position, and other variables of a particular process. Of course, other computer programs, such as, for example, programs stored in another memory device, including a floppy disk or another suitable drive, may also be used to operate the controller 80.
    [34] The process of depositing and reflowing (ie, annealing) the highly doped BPSG film can be performed using a computer program product stored in memory 82 and executed by controller 80. The computer program code may be written in a conventional computer readable programming language such as 68000 assembly language, C, C ++, Pascal, Fortran, or other languages. Appropriate program code is entered into a single file or multiple files using conventional text editors and stored or embodied in a computer usable medium, such as a computer's memory system. If the input code text is a high level language, the code is compiled and the final compiler code is linked with the object code of the precompiled Windows library routines. To execute the linked compilation object code, the system user calls the object code, causing the computer system to load the code into memory, from which the CPU reads and executes code that executes the identified task in the program. Also stored in memory 82 are process variables such as pressure, temperature, reactant gas flow rate and composition required to perform deposition and reflow of boron-phosphorus doped amorphous or polycrystalline silicon films in situ in accordance with the present invention. do.
    [35] FIG. 2 illustrates one embodiment of a hierarchy of system control computer programs stored in memory 82 of system controller 80 of the multichamber system of FIG. 1A. The system control program includes a chamber manager subroutine 90. Chamber manager subroutine 90 also controls the execution of various chamber component subroutines that control the operation of the chamber components needed to execute the selected process set. An example of the chamber component subroutine is the process reactant gas control subroutine 92. Those skilled in the art will readily appreciate that other chamber control subroutines may be included depending on which process in the process chambers 12a-c, 14, 16, 18 is desired to be performed. During operation, chamber manager subroutine 90 selectively schedules or requests process component subroutines depending on the particular set of processes executed. In general, the chamber manager subroutine 90 monitors various chamber components, determines which components need to be operated based on the process variables on which the process set is executed, and in response to the monitoring and determining steps. Executing the chamber component subroutine.
    [36] The reactant gas control subroutine 92 has program code for controlling the reactant gas composition and flow rate. The reactive gas control subroutine 92 controls the opening and closing position of the safety shutoff valve, and also ramps up / down the mass flow controller to obtain the desired gas flow rate. The reactive gas control subroutine 92 receives from the chamber manager subroutine process variables caused by the chamber manager subroutine 90 and associated with the desired gas flow rate as in all chamber component subroutines. In general, the reactant gas control subroutine 92 opens the gas supply line, repeatedly (i) reads the required mass flow controller, and (ii) at a predetermined flow rate received from the chamber manager subroutine 90. Compare the readings and (i) adjust the flow rate of the gas supply line as needed. Moreover, the reactant gas control subroutine 92 includes monitoring the gas flow rate for unstable velocity and actuating a safety shutoff valve when an unstable condition is detected.
    [37] The pressure control subroutine 94 controls the chambers 12a-c, 14, 16, and / or by adjusting the opening size of the throttle valve set to control the chamber pressure to a predetermined level in relation to the total process gas flow, process chamber size. Or program code for adjusting the pressure in 18) and pumping the set point pressure for the exhaust system. When the pressure control subroutine 94 operates by reading the pressure in the chambers 12a-c, 14, 16, and / or 18 by reading one or more conventional pressure nanometers connected to the chamber, the measured and target pressures are compared and The PID (proportional, integral, and differential) values are obtained from the stored pressure table corresponding to the target pressure, and the throttle valve is adjusted according to the PID values obtained from the pressure table. Optionally, the pressure control subroutine 94 may be recorded to open or close the throttle valve to a specific open size that regulates the chambers 12a-c, 14, 16, and / or 18 to the desired pressure.
    [38] The lamp control subroutine 96 includes program code for controlling the power provided to the lamps in the chambers 12a-c and 14 used to heat the substrate 50. Ramp control subroutine 96 is also caused by temperature variables. The ramp control subroutine 96 measures temperature by measuring the voltage output of the temperature measuring device (item 28 in FIG. 1B) displayed on the susceptor, compares the measured temperature with the set point temperature, and obtains the set point temperature. To increase or decrease the power applied to the lamp.
    [39] Applicants stored in the program the code of the process of forming a high concentration borophosphosilicate glass film stabilized in situ. The computer readable program introduces a reaction gas mixture comprising silicon source gas, boron source gas, phosphorus source gas, and carrier gas into the chamber to form a high concentration of borophosphosilicate glass layer on a substrate located in the chamber. Instructions for controlling the gas delivery system. The computer readable program further includes instructions to control the reflow temperature and ambient of the high concentration borophosphosilicate glass layer formed to fill one or more trenches in the substrate.
    [40] How to form high concentration borophosphosilicate glass (BPSG) film stabilized in-situ
    [41] 3 is a schematic diagram of one embodiment of a method of forming a high concentration borophosphosilicate glass (BPSG) film stabilized in situ on a semiconductor wafer in accordance with the present invention. The method is generally carried out in multiple steps and is integrated into various main process steps. The method generally includes depositing a dielectric film, such as a high concentration of borophosphosilicate glass (BPSG) film, on a substrate by sub-atmospheric chemical vapor deposition (SACVD) (step 100 in FIG. 3). The method may optionally include depositing a capping layer of undoped silicon glass (USG) on the BPSG film (step 200 in FIG. 2). The method then includes rapid thermal processing (RTP) the deposited BPSG film layer by rapidly heating the substrate to a reflow temperature of about 600 ° C. or more (step 300 in FIG. 3). The substrate may be used for gap filling and / or planarization of substrate trenches having a high aspect ratio or to form a uniform dopant concentration through the film layer or to drive dopant redistribution to densify the BPSG film, thereby reflowing the deposited dielectric layer. It may also be rapidly heated for various purposes such as performing. Subsequent to the RTP, the substrate may be cooled for some time before being removed from the multichamber system 10 (step 400 in FIG. 3).
    [42] In a preferred embodiment, the process comprises the steps of depositing a high concentration of BPSG film on a substrate / wafer at a deposition temperature of about 600 ° C. or less first, and then preferably a wafer having a BPSG film thereon. It may also be carried out in a step of rapid heating to a reflow temperature of at least ℃.
    [43] BPSG Film Deposition
    [44] 1A and 3, as part of step 100, a high concentration of BPSG film is deposited on a substrate by chemical vapor deposition (CVD) in a multichamber system 10 having a pressure of about 60-750 Torr. High concentrations of BPSG films may contain phosphorus-containing and boron-containing sources together with the silicon- and oxygen-containing sources generally required to form a silicon oxide layer, such as one of the chambers of the multichamber system 10, for example chambers. Inflowing into (12a-c) deposits on the substrate at a temperature of at least about 300 ° C and preferably at least about 480 ° C.
    [45] As the silicon source, the process of the present invention preferably uses tetraethyloltosilicate (TEOS), although other silicon containing sources may be used within the scope of the present invention. Examples of oxygen containing sources that may be used within the scope of the present invention include ozone (O 3 ) and oxygen (O 2 ). Examples of boron containing sources that may be used in the methods of the present invention include triethylborate (TEB), trimethylborate (TMB), and similar compounds. Examples of phosphorus containing sources that may be used in the methods of the present invention include triethylphosphate (TEPO), triethylphosphite (TEP i ), trimethylphosphate (TMOP), trimethylphosphite (TMP i ), and similar compounds do. In a preferred embodiment, the method uses triethylborate (TEB) as the boron source and triethylphosphate (TEPO) as the phosphorus source.
    [46] 1B and 3, an exemplary BPSG film / layer heats a semiconductor wafer / substrate 50 and a heater 28 in a chamber 22 to about 300-600 ° C., preferably about 480 ° C., at this temperature. Deposited by maintaining the range through deposition. Chamber 22 is maintained at a pressure in the range of about 60-750 Torr, preferably about 150-250 Torr, and more preferably about 200 Torr. The heater 28 is located about 50-400 mils from the gas distribution plate 26 and preferably about 200 mils from the plate 26.
    [47] Process variables and values appearing in the detailed description below are applicable to SACVD chambers 22 generally having a volume of about 2 liters. Those skilled in the art will appreciate that these process variables and values may need to be appropriately modified to account for chamber system / chamber arrangements, process configurations and other chamber performance (ie, volume), and other variables that are specific to a particular manufacturer.
    [48] A process gas is formed comprising TEB as a source of boron, TEPO as a source of phosphorus, TEOS as a source of silicon, and O 3 as a gaseous source of oxygen. The liquid TEB, TEPO and TEOS sources are vaporized by the liquid injection system 44 and mixed with an inert carrier gas such as helium in the gas mixing block (or gas mixing box) 42. As mentioned above, it is recognized that other sources of boron, phosphorus, silicon, and oxygen may be used. For 200 mm systems, the flow rate of TEB is preferably about 100-300 milligrams per minute (mgm), preferably about 190 mgm. The flow rate of TEPO is about 10-150 mgm, preferably about 90 mgm, and the flow rate of TEOS is about 200-1000 mgm, preferably about 600 mgm, depending on the desired dopant concentration. The vaporized TEOS, TEB, and TEPO gases are then mixed with helium carrier gas flowing at a rate of about 2000-8000 sccm (standard cubic centimeter), preferably about 6000 sccm. Oxygen in O 3 form is introduced at a flow rate in the range of about 2000-6000 sccm and preferably at a flow rate of about 4000 sccm. The ozone mixture contains about 5-20 wt% (wt%) oxygen. The gas mixture enters the chamber 22 from the gas distribution plate 26 to supply the reactant gas to the substrate surface 50 where a heat induced chemical reaction takes place to produce the desired film.
    [49] The aforementioned conditions result in a high concentration of BPSG film deposited at a rate in the range of 2000-6000 kW / min. By controlling the deposition time, the thickness of the deposited BPSG film may be easily controlled. The final high concentration of BPSG film has a boron concentration level in the range of about 2-7 wt% and a force in the range of about 2-9 wt% relative to the combined total weight of boron and phosphorus concentrations of about 10-12 wt% BPSG film / layer. Have a porous concentration level. In an embodiment, the final BPSG film has a boron concentration level of about 3 wt% and a phosphorus concentration level of about 9 wt%.
    [50] 4A is a simple cross sectional view of the substrate 50 at an intermediate stage of manufacture (step 200 of FIG. 3). 4A shows the substrate 50 after the BPSG layer 51 is deposited on the substrate surface. As shown in FIG. 4A, in this manufacturing step, the substrate 50 may include one or more gap or trench regions 53, 55 formed during the processing step prior to the deposition of the BPSG layer / film 51. After deposition of the BPSG layer / film 51, the wide, shallow gap or trench 53 may be completely filled by the BPSG film 51. However, a narrow gap / trench 55 having a high aspect ratio (ie, height 63 / width 65 as shown in FIG. 4A) is such that layer 51 is pinched off in region 57. It may be only partially filled with BPSG film 51 because it leaves voids 59. The voids 59 in the substrate 50 are unacceptable for the manufacture of reliable integrated circuits, and therefore the voids 59 are removed during the reflow step (step 300 of FIG. 3) of the method of the present invention.
    [51] 3 and 4A, the deposited high concentration BPSG layer 51 may optionally be covered with a thin, separate undoped silicon glass (USG) layer 61. USG capping layer 61 prevents surface hydrolysis of highly doped BPSG layers.
    [52] USG layer 61 may be deposited from BPSG layer 51 in a separate processing chamber, but is preferably deposited in-situ in chambers 12a-c where deposition of BPSG layer 51 occurs. In accordance with an embodiment of the invention, the in situ USG or similar cap layer 61 as part of an optional step 200 of the method of the present invention stops the boron source and the phosphorus source immediately before the completion of the deposition of the BPSG layer. Thereby forming on the doped dielectric film, eg, BPSG film, in the SACVD chambers 12a-c. In this embodiment, the initial BPSG layer 51 is formed as described above. The flow of TEB and TEPO into the vacuum chamber 22 is stopped while the thermal reaction of TEOS and O 3 continues for an additional time, generally for a period of about 1-60 seconds. Preferably, the thermal reaction is continued for about 3-10 seconds.
    [53] The formed USG cap layer 61 may have a thickness in the range of about 50-500 mm 3, preferably in the range of about 100-200 mm 3. However, those skilled in the art will understand that capping layers of different thicknesses may be used depending on the particular application and device structure size.
    [54] Perform BPSG Reflow
    [55] 1C, 3 and 4A, the third main process block (block 300 in FIG. 3) is a high concentration of BPSG film 51 (deposited on substrate 50) deposited thereon, if USG film ( 61) is heated to a temperature of at least about < RTI ID = 0.0 > 600 C. < / RTI > Substrate 50 is deposited for gap filling and / or planarization of the high aspect ratio trenches, such as trench 55 in FIG. 4A (and thus removing voids 59) or for driving dopants from the deposited doped dielectric layer. It may be heated for a variety of purposes, such as to perform reflow of the dielectric layer.
    [56] Such heating may be carried out using rapid thermal processing (RTP) methods or for example conventional furnaces, and may be dried (eg N 2 or O 2 ) atmosphere, wet (eg water vapor, H 2 O) It may be carried out in an atmosphere, in a wet atmosphere formed by the in-situ reaction of H 2 and O 2 , or a combination thereof (ex-situ). In a preferred embodiment, step 300 of FIG. 3 is carried out using an RTP scheme performed in a humid atmosphere formed by the in-situ reaction of H 2 and O 2 .
    [57] In one embodiment of the method of the invention, the RTP reflow step 300 heats the RTP chamber 14 or substrate of the multichamber system 10 with a substrate 50 having a high concentration of BPSG film 51 thereon. It may be initiated by mounting in another type of substrate processing chamber that may be. During the substrate mounting process, oxygen from the oxygen source 78 flows into the RTP chamber 14 to form an oxygen atmosphere in the chamber 14. The temperature of the RTP chamber 14 is initially set generally in the range of about 300 ° C to 650 ° C. The mounting temperature is set at 700 ° C. or lower to minimize the compaction of the BPSG film 51 before the formation of the steam atmosphere.
    [58] After a predetermined time, typically about 30 seconds to 3 minutes, after the substrate 50 is mounted in the RTP chamber 14, hydrogen from the hydrogen source 76 provides a steam (H 2 / O 2 ) atmosphere. Flow into the RTP chamber 14 to do so. The temperature of the chamber 14 is then increased from the initial set temperature to a second temperature above the reflow temperature of the BPSG layer 51 and the optimum rate is at least one of the wafer for reflow temperature, complete issues and cracking used among others. It is determined based on emotion. Reflow temperatures are generally set in the range of about 600-1050 ° C. In one embodiment, the reflow temperature is set slightly higher than about 600-850 ° C, preferably about 700 ° C. In a preferred embodiment, this temperature increase occurs at a rate in the range of 20-40 ° C. per second until the desired temperature is achieved and the BPSG film / layer can flow up to about 5 minutes. The actual time for the sub-step depends, among other factors, on the initial temperature setting of the RTP chamber 14, the temperature selected to reflow the layer 51, the glass transition temperature of the layer 51 and the temperature ramping rate.
    [59] It should be noted that the glass transition temperature of a given BPSG film layer, such as film layer 51, depends on the boron and phosphorus dopant concentrations of the layer as would be understood by those skilled in the art. Increasing the boron concentration of the BPSG layer is the most important factor when reducing the reflow temperature of the layer. The high concentration of BPSG films of the present invention have a boron concentration in the range of about 2-7 wt%, a phosphorus concentration in the range of about 2-9 wt%, and a combined dopant concentration (boron and phosphorus) of about 10-12 wt%.
    [60] Once the reflow temperature is reached, the substrate 50 is maintained in the RTP chamber 14 to reflow and planarize the BPSG film layer 51. The reflow process is generally carried out at atmospheric or higher pressure, except for in-situ steam generation, where a low pressure of 20 Torr or less is applied for safe operation, so that the BPSG film layer flows and the trench 55 From the wall of the material flows into the void 59 by flow. In general, the reflow step (step 300 in FIG. 3) lasts for a time ranging from about 5 seconds to 5 minutes depending on the temperature used to reflow the bed and the desired degree of planarization.
    [61] Optionally, in another embodiment, prior to unloading the substrate 50 from the RTP chamber 14, the oxygen flow continues while the hydrogen flow is stopped to anneal the layer BPSG film layer 51 only in an oxygen atmosphere. do. This step, generally referred to as “dry anneal”, helps minimize the hydrogen and moisture content in layer 51. Preferably, the dry anneal step lasts about 2 to 10 seconds.
    [62] 4B is a simple cross sectional view of the substrate 50 with the BPSG film 51 deposited thereon following the reflow step 300 of the method of the present invention. Note that the optional USG film layer 61 shown in FIG. 4A is not shown in FIG. 4B. As shown in FIG. 4B, the reflow of the BPSG film layer 51 deposited in accordance with the method of the present invention not only flattens the BPSG film 51 but also fills the high aspect ratio trench 55, thereby forming voids 59. Is removed (shown in FIG. 4A).
    [63] After the BPSG layer 51 is annealed or flowed, the RTP chamber temperature is reduced and the substrate 50 undergoes a cooling step (step 400 in FIG. 3). In one embodiment, the cooling step 400 may be performed in the chamber 16 of the multichamber system 10 (shown in FIG. 1A) under vacuum conditions. The cooling step 400 may last from several minutes up to several hours to several days. Optionally, the cooling step 400 may be performed by removing the substrate 50 from the multichamber system 10 and mounting it in a separate storage area / chamber (not shown) where the substrate is stored until used in IC fabrication.
    [64] The deposition and reflow of high concentrations of BPSG layer 51 in accordance with the method of the present invention may be achieved by narrow gaps or trenches such as trenches 55 of FIGS. 4A and 4B having aspect ratios ranging from about 7: 1 to 10: 1, and It is expected that the trench width below 0.02 microns will be fully filled.
    [65] Therefore, a method and apparatus for forming a high concentration borophosphosilicate glass (BPSG) film stabilized in situ on a semiconductor wafer has been described. While specific embodiments have been described, including specific equipment, variables, methods, and materials, it will be apparent to those skilled in the art that various modifications may be made to the disclosed embodiments. Therefore, it is to be understood that such embodiments are for the purpose of description only and are not intended to limit the scope of the invention, but the invention is not limited to the specific embodiments shown and described.
    权利要求:
    Claims (27)
    [1" claim-type="Currently amended] A method of forming a high concentration of borophosphosilicate glass layer on a substrate,
    Providing a substrate in the chamber,
    Providing a silicon source, an oxygen source, a boron source and a phosphorous source to the chamber to form a high concentration of borophosphosilicate glass layer on the substrate, and
    Reflowing the high concentration of borophosphosilicate glass layer formed on the substrate,
    A method of forming a high concentration of borophosphosilicate glass layer.
    [2" claim-type="Currently amended] The method of claim 1,
    Further cooling the substrate for a predetermined time after reflowing the high concentration of borophosphosilicate glass layer formed on the substrate,
    A method of forming a high concentration of borophosphosilicate glass layer.
    [3" claim-type="Currently amended] The method of claim 1,
    Wherein said high concentration of borophosphosilicate glass layer comprises about 2-7 weight percent boron and about 2-9 weight percent phosphorus,
    A method of forming a high concentration of borophosphosilicate glass layer.
    [4" claim-type="Currently amended] The method of claim 1,
    The combined weight percent boron and phosphorus present in the high concentration of borophosphosilicate glass layer is about 10-12 weight percent,
    A method of forming a high concentration of borophosphosilicate glass layer.
    [5" claim-type="Currently amended] The method of claim 1,
    Providing silicon, oxygen, boron and phosphorus sources to the chamber to form a high concentration of borophosphosilicate glass layer on the substrate, wherein the step is performed at a deposition temperature in the range of about 300-600 ° C.
    A method of forming a high concentration of borophosphosilicate glass layer.
    [6" claim-type="Currently amended] The method of claim 1,
    Reflowing the high concentration of borophosphosilicate glass layer is about 600-1050 ° C. in an atmosphere selected from the group consisting of a dry atmosphere, a steam atmosphere, a water atmosphere and an atmosphere formed by an in-situ reaction of H 2 and O 2 . Performed at a temperature in the range,
    A method of forming a high concentration of borophosphosilicate glass layer.
    [7" claim-type="Currently amended] The method of claim 1,
    Wherein the silicon source is TEOS,
    A method of forming a high concentration of borophosphosilicate glass layer.
    [8" claim-type="Currently amended] The method of claim 1,
    The oxygen source is O 3 ,
    A method of forming a high concentration of borophosphosilicate glass layer.
    [9" claim-type="Currently amended] The method of claim 1,
    The boron source comprises TEB,
    A method of forming a high concentration of borophosphosilicate glass layer.
    [10" claim-type="Currently amended] The method of claim 1,
    The phosphorous source comprises TEPO,
    A method of forming a high concentration of borophosphosilicate glass layer.
    [11" claim-type="Currently amended] The method of claim 1,
    Wherein the high concentration of borophosphosilicate glass layer fills one or more trenches included in the substrate having an aspect ratio of about 7: 1 to 10: 1,
    A method of forming a high concentration of borophosphosilicate glass layer.
    [12" claim-type="Currently amended] As a method of forming an insulating layer on a substrate,
    Providing a substrate to the chamber,
    Providing a silicon source, an oxygen source, a boron source and a phosphorous source for chemical vapor deposition of a high concentration of borophosphosilicate glass layer on the substrate,
    Forming a second insulating layer of undoped silicon glass on the high concentration borophosphosilicate glass layer, and
    Reflowing a high concentration of borophosphosilicate glass layer deposited on the substrate,
    A method of forming an insulating layer on a substrate.
    [13" claim-type="Currently amended] The method of claim 12,
    Wherein said high concentration of borophosphosilicate glass layer comprises about 2-7 weight percent boron and about 2-9 weight percent phosphorus,
    A method of forming an insulating layer on a substrate.
    [14" claim-type="Currently amended] The method of claim 12,
    The combined weight percent boron and phosphorus present in the high concentration of borophosphosilicate glass layer is about 10-12 weight percent,
    A method of forming an insulating layer on a substrate.
    [15" claim-type="Currently amended] The method of claim 12,
    Reflowing the high concentration of borophosphosilicate glass layer is about 600-1050 ° C. in an atmosphere selected from the group consisting of a dry atmosphere, a steam atmosphere, a water atmosphere and an atmosphere formed by an in-situ reaction of H 2 and O 2 . Performed at a temperature in the range,
    A method of forming an insulating layer on a substrate.
    [16" claim-type="Currently amended] The method of claim 1,
    The silicon source is TEOS flowing into the chamber at a rate of about 200-1000 milligrams / minute,
    A method of forming a high concentration of borophosphosilicate glass layer.
    [17" claim-type="Currently amended] The method of claim 1,
    The boron source is TEB flowing into the chamber at a rate of about 100-300 milligrams / minute,
    A method of forming a high concentration of borophosphosilicate glass layer.
    [18" claim-type="Currently amended] The method of claim 1,
    The phosphorous source is TEPO flowing into the chamber at a rate of about 10-150 milligrams / minute,
    A method of forming a high concentration of borophosphosilicate glass layer.
    [19" claim-type="Currently amended] The method of claim 1,
    The oxygen source is O 3 flowing into the chamber at a rate of about 2000-6000 sccm,
    A method of forming a high concentration of borophosphosilicate glass layer.
    [20" claim-type="Currently amended] The method of claim 1,
    Wherein said high concentration of borophosphosilicate glass layer is formed in said chamber at a rate in the range of about 2000 to 6000 kW / min.
    A method of forming a high concentration of borophosphosilicate glass layer.
    [21" claim-type="Currently amended] The method of claim 12,
    The second insulating glass layer has a thickness in the range of about 100 to 200 microseconds,
    A method of forming an insulating layer on a substrate.
    [22" claim-type="Currently amended] A method of depositing an insulating layer on a substrate having one or more trenches, the method comprising:
    Chemical vapor deposition of a high concentration of borophosphosilicate glass layer on the substrate by providing TEOS, O 3 , TEB and TEPO to the chamber at a deposition temperature of about 300 ° C. to 600 ° C. and a sub atmospheric pressure of about 60 to 750 Torr And wherein the high concentration of borophosphosilicate glass layer comprises up to about 7.0 weight percent boron and about 9 weight percent phosphorus relative to about 10-12 weight percent combined boron and phosphorus concentration. Chemical vapor deposition of a high concentration of borophosphosilicate glass layer, and
    Reflowing the deposited high concentration borophosphosilicate glass layer to a reflow temperature in the range of about 600 ° C. to 1050 ° C. to fill one or more trenches in the substrate with the high concentration borophosphosilicate glass layer. doing,
    A method of depositing an insulating layer.
    [23" claim-type="Currently amended] The method of claim 22,
    The one or more trenches have a high aspect ratio of about 4: 1 to 10: 1,
    A method of depositing an insulating layer.
    [24" claim-type="Currently amended] A substrate processing system,
    A substrate holder located in the chamber,
    A gas delivery system for introducing a reactant gas mixture into the chamber to deposit an insulating layer on the substrate,
    A pump coupled to the gas outlet for controlling the chamber pressure,
    A rapid thermal anneal system for reflowing the layer deposited on the substrate,
    A controller for controlling said gas delivery system and said pump, and also said rapid thermal annealing system, and
    A memory coupled to the controller, the computer comprising a computer readable medium having a computer readable program thereon for directing operation of the substrate processing system,
    The computer readable program comprises a reactive gas mixture comprising a silicon source gas, a boron source gas, a phosphorous source gas, and a carrier gas to deposit a high concentration of borophosphosilicate glass layer on a substrate located on the substrate holder. Controlling the gas delivery system to introduce a gas into the chamber and to control a reflow temperature at which the deposited high concentration of borophosphosilicate glass layer can fill trenches in the substrate,
    Substrate processing system.
    [25" claim-type="Currently amended] The method of claim 24,
    The high concentration borophosphosilicate glass layer has a boron concentration in the range of about 2-7 wt% and a phosphorus concentration in the range of about 2-9 wt% relative to about 10-12 wt% of combined boron and phosphorus concentrations. ,
    Substrate processing system.
    [26" claim-type="Currently amended] The method of claim 24,
    The reflow is carried out at a reflow temperature in the range of about 600-1050 ° C. in an atmosphere selected from the group consisting of a dry atmosphere, a steam atmosphere, a water atmosphere and an atmosphere formed by the in-situ reaction of H 2 and O 2 .
    Substrate processing system.
    [27" claim-type="Currently amended] The method of claim 24,
    The trench has a high aspect ratio of about 4: 1 to 10: 1,
    Substrate processing system.
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    同族专利:
    公开号 | 公开日
    WO2003010355A1|2003-02-06|
    US20030019427A1|2003-01-30|
    JP2005518087A|2005-06-16|
    EP1409765A1|2004-04-21|
    CN1535328A|2004-10-06|
    引用文献:
    公开号 | 申请日 | 公开日 | 申请人 | 专利标题
    法律状态:
    2001-07-24|Priority to US09/912,495
    2001-07-24|Priority to US09/912,495
    2002-07-23|Application filed by 어플라이드 머티어리얼스, 인코포레이티드
    2002-07-23|Priority to PCT/US2002/023520
    2004-04-09|Publication of KR20040030827A
    优先权:
    申请号 | 申请日 | 专利标题
    US09/912,495|2001-07-24|
    US09/912,495|US20030019427A1|2001-07-24|2001-07-24|In situ stabilized high concentration BPSG films for PMD application|
    PCT/US2002/023520|WO2003010355A1|2001-07-24|2002-07-23|Method for cvd of bpsg films|
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